75 lines
5.8 KiB
Markdown
75 lines
5.8 KiB
Markdown
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**Opcode1**
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||Instruction|Op/En|64-Bit Mode|Compat/Leg Mode|Description|
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|D0 /4|SAL r/m8, 1|M1|Valid|Valid|Multiply r/m8 by 2, once.|
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|REX + D0 /4|SAL r/m82, 1|M1|Valid|N.E.|Multiply r/m8 by 2, once.|
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|D2 /4|SAL r/m8, CL|MC|Valid|Valid|Multiply r/m8 by 2, CL times.|
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|REX + D2 /4|SAL r/m82, CL|MC|Valid|N.E.|Multiply r/m8 by 2, CL times.|
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|C0 /4 ib|SAL r/m8, imm8|MI|Valid|Valid|Multiply r/m8 by 2, imm8 times.|
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|REX + C0 /4 ib|SAL r/m82, imm8|MI|Valid|N.E.|Multiply r/m8 by 2, imm8 times.|
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|D1 /4|SAL r/m16, 1|M1|Valid|Valid|Multiply r/m16 by 2, once.|
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|D3 /4|SAL r/m16, CL|MC|Valid|Valid|Multiply r/m16 by 2, CL times.|
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|C1 /4 ib|SAL r/m16, imm8|MI|Valid|Valid|Multiply r/m16 by 2, imm8 times.|
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|D1 /4|SAL r/m32, 1|M1|Valid|Valid|Multiply r/m32 by 2, once.|
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|REX.W + D1 /4|SAL r/m64, 1|M1|Valid|N.E.|Multiply r/m64 by 2, once.|
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|D3 /4|SAL r/m32, CL|MC|Valid|Valid|Multiply r/m32 by 2, CL times.|
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|REX.W + D3 /4|SAL r/m64, CL|MC|Valid|N.E.|Multiply r/m64 by 2, CL times.|
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|C1 /4 ib|SAL r/m32, imm8|MI|Valid|Valid|Multiply r/m32 by 2, imm8 times.|
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|REX.W + C1 /4 ib|SAL r/m64, imm8|MI|Valid|N.E.|Multiply r/m64 by 2, imm8 times.|
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|D0 /7|SAR r/m8, 1|M1|Valid|Valid|Signed divide3 r/m8 by 2, once.|
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|REX + D0 /7|SAR r/m82, 1|M1|Valid|N.E.|Signed divide3 r/m8 by 2, once.|
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|D2 /7|SAR r/m8, CL|MC|Valid|Valid|Signed divide3 r/m8 by 2, CL times.|
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|REX + D2 /7|SAR r/m82, CL|MC|Valid|N.E.|Signed divide3 r/m8 by 2, CL times.|
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|C0 /7 ib|SAR r/m8, imm8|MI|Valid|Valid|Signed divide3 r/m8 by 2, imm8 times.|
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|REX + C0 /7 ib|SAR r/m82, imm8|MI|Valid|N.E.|Signed divide3 r/m8 by 2, imm8 times.|
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|D1 /7|SAR r/m16,1|M1|Valid|Valid|Signed divide3 r/m16 by 2, once.|
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|D3 /7|SAR r/m16, CL|MC|Valid|Valid|Signed divide3 r/m16 by 2, CL times.|
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|C1 /7 ib|SAR r/m16, imm8|MI|Valid|Valid|Signed divide3 r/m16 by 2, imm8 times.|
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|D1 /7|SAR r/m32, 1|M1|Valid|Valid|Signed divide3 r/m32 by 2, once.|
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|REX.W + D1 /7|SAR r/m64, 1|M1|Valid|N.E.|Signed divide3 r/m64 by 2, once.|
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|D3 /7|SAR r/m32, CL|MC|Valid|Valid|Signed divide3 r/m32 by 2, CL times.|
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|REX.W + D3 /7|SAR r/m64, CL|MC|Valid|N.E.|Signed divide3 r/m64 by 2, CL times.|
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|C1 /7 ib|SAR r/m32, imm8|MI|Valid|Valid|Signed divide3 r/m32 by 2, imm8 times.|
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|REX.W + C1 /7 ib|SAR r/m64, imm8|MI|Valid|N.E.|Signed divide3 r/m64 by 2, imm8 times|
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|D0 /4|SHL r/m8, 1|M1|Valid|Valid|Multiply r/m8 by 2, once.|
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|REX + D0 /4|SHL r/m82, 1|M1|Valid|N.E.|Multiply r/m8 by 2, once.|
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|D2 /4|SHL r/m8, CL|MC|Valid|Valid|Multiply r/m8 by 2, CL times.|
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|REX + D2 /4|SHL r/m82, CL|MC|Valid|N.E.|Multiply r/m8 by 2, CL times.|
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|C0 /4 ib|SHL r/m8, imm8|MI|Valid|Valid|Multiply r/m8 by 2, imm8 times.|
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|REX + C0 /4 ib|SHL r/m82, imm8|MI|Valid|N.E.|Multiply r/m8 by 2, imm8 times.|
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|D1 /4|SHL r/m16,1|M1|Valid|Valid|Multiply r/m16 by 2, once.|
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|D3 /4|SHL r/m16, CL|MC|Valid|Valid|Multiply r/m16 by 2, CL times.|
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|C1 /4 ib|SHL r/m16, imm8|MI|Valid|Valid|Multiply r/m16 by 2, imm8 times.|
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|D1 /4|SHL r/m32,1|M1|Valid|Valid|Multiply r/m32 by 2, once.|
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**Opcode1**
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| | Instruction | Op/En | 64-Bit Mode | Compat/Leg Mode | Description |
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| ---------------- | --------------- | ----- | ----------- | --------------- | --------------------------------------- |
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| REX.W + D1 /4 | SHL r/m64,1 | M1 | Valid | N.E. | Multiply r/m64 by 2, once. |
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| D3 /4 | SHL r/m32, CL | MC | Valid | Valid | Multiply r/m32 by 2, CL times. |
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| REX.W + D3 /4 | SHL r/m64, CL | MC | Valid | N.E. | Multiply r/m64 by 2, CL times. |
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| C1 /4 ib | SHL r/m32, imm8 | MI | Valid | Valid | Multiply r/m32 by 2, imm8 times. |
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| REX.W + C1 /4 ib | SHL r/m64, imm8 | MI | Valid | N.E. | Multiply r/m64 by 2, imm8 times. |
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| D0 /5 | SHR r/m8,1 | M1 | Valid | Valid | Unsigned divide r/m8 by 2, once. |
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| REX + D0 /5 | SHR r/m82, 1 | M1 | Valid | N.E. | Unsigned divide r/m8 by 2, once. |
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| D2 /5 | SHR r/m8, CL | MC | Valid | Valid | Unsigned divide r/m8 by 2, CL times. |
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| REX + D2 /5 | SHR r/m82, CL | MC | Valid | N.E. | Unsigned divide r/m8 by 2, CL times. |
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| C0 /5 ib | SHR r/m8, imm8 | MI | Valid | Valid | Unsigned divide r/m8 by 2, imm8 times. |
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| REX + C0 /5 ib | SHR r/m82, imm8 | MI | Valid | N.E. | Unsigned divide r/m8 by 2, imm8 times. |
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| D1 /5 | SHR r/m16, 1 | M1 | Valid | Valid | Unsigned divide r/m16 by 2, once. |
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| D3 /5 | SHR r/m16, CL | MC | Valid | Valid | Unsigned divide r/m16 by 2, CL times |
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| C1 /5 ib | SHR r/m16, imm8 | MI | Valid | Valid | Unsigned divide r/m16 by 2, imm8 times. |
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| D1 /5 | SHR r/m32, 1 | M1 | Valid | Valid | Unsigned divide r/m32 by 2, once. |
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| REX.W + D1 /5 | SHR r/m64, 1 | M1 | Valid | N.E. | Unsigned divide r/m64 by 2, once. |
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| D3 /5 | SHR r/m32, CL | MC | Valid | Valid | Unsigned divide r/m32 by 2, CL times. |
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| REX.W + D3 /5 | SHR r/m64, CL | MC | Valid | N.E. | Unsigned divide r/m64 by 2, CL times. |
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| C1 /5 ib | SHR r/m32, imm8 | MI | Valid | Valid | Unsigned divide r/m32 by 2, imm8 times. |
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| REX.W + C1 /5 ib | SHR r/m64, imm8 | MI | Valid | N.E. | Unsigned divide r/m64 by 2, imm8 times. |
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> 1. See the IA-32 Architecture Compatibility section below.
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> 2. In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is used: AH, BH, CH, DH.
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>
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> 3. Not the same form of division as IDIV; rounding is toward negative infinity.
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