| Opcode           | Instruction     | Op/En | 64-Bit Mode | Compat/Leg Mode | Description                            |
| ---------------- | --------------- | ----- | ----------- | --------------- | -------------------------------------- |
| D0 /7            | SAR r/m8, 1     | M1    | Valid       | Valid           | Signed divide3 r/m8 by 2, once.        |
| REX + D0 /7      | SAR r/m82, 1    | M1    | Valid       | N.E.            | Signed divide3 r/m8 by 2, once.        |
| D2 /7            | SAR r/m8, CL    | MC    | Valid       | Valid           | Signed divide3 r/m8 by 2, CL times.    |
| REX + D2 /7      | SAR r/m82, CL   | MC    | Valid       | N.E.            | Signed divide3 r/m8 by 2, CL times.    |
| C0 /7 ib         | SAR r/m8, imm8  | MI    | Valid       | Valid           | Signed divide3 r/m8 by 2, imm8 times.  |
| REX + C0 /7 ib   | SAR r/m82, imm8 | MI    | Valid       | N.E.            | Signed divide3 r/m8 by 2, imm8 times.  |
| D1 /7            | SAR r/m16,1     | M1    | Valid       | Valid           | Signed divide3 r/m16 by 2, once.       |
| D3 /7            | SAR r/m16, CL   | MC    | Valid       | Valid           | Signed divide3 r/m16 by 2, CL times.   |
| C1 /7 ib         | SAR r/m16, imm8 | MI    | Valid       | Valid           | Signed divide3 r/m16 by 2, imm8 times. |
| D1 /7            | SAR r/m32, 1    | M1    | Valid       | Valid           | Signed divide3 r/m32 by 2, once.       |
| REX.W + D1 /7    | SAR r/m64, 1    | M1    | Valid       | N.E.            | Signed divide3 r/m64 by 2, once.       |
| D3 /7            | SAR r/m32, CL   | MC    | Valid       | Valid           | Signed divide3 r/m32 by 2, CL times.   |
| REX.W + D3 /7    | SAR r/m64, CL   | MC    | Valid       | N.E.            | Signed divide3 r/m64 by 2, CL times.   |
| C1 /7 ib         | SAR r/m32, imm8 | MI    | Valid       | Valid           | Signed divide3 r/m32 by 2, imm8 times. |
| REX.W + C1 /7 ib | SAR r/m64, imm8 | MI    | Valid       | N.E.            | Signed divide3 r/m64 by 2, imm8 times  |