**Opcode1**

||Instruction|Op/En|64-Bit Mode|Compat/Leg Mode|Description|
|---|---|---|---|---|---|
|D0 /4|SAL r/m8, 1|M1|Valid|Valid|Multiply r/m8 by 2, once.|
|REX + D0 /4|SAL r/m82, 1|M1|Valid|N.E.|Multiply r/m8 by 2, once.|
|D2 /4|SAL r/m8, CL|MC|Valid|Valid|Multiply r/m8 by 2, CL times.|
|REX + D2 /4|SAL r/m82, CL|MC|Valid|N.E.|Multiply r/m8 by 2, CL times.|
|C0 /4 ib|SAL r/m8, imm8|MI|Valid|Valid|Multiply r/m8 by 2, imm8 times.|
|REX + C0 /4 ib|SAL r/m82, imm8|MI|Valid|N.E.|Multiply r/m8 by 2, imm8 times.|
|D1 /4|SAL r/m16, 1|M1|Valid|Valid|Multiply r/m16 by 2, once.|
|D3 /4|SAL r/m16, CL|MC|Valid|Valid|Multiply r/m16 by 2, CL times.|
|C1 /4 ib|SAL r/m16, imm8|MI|Valid|Valid|Multiply r/m16 by 2, imm8 times.|
|D1 /4|SAL r/m32, 1|M1|Valid|Valid|Multiply r/m32 by 2, once.|
|REX.W + D1 /4|SAL r/m64, 1|M1|Valid|N.E.|Multiply r/m64 by 2, once.|
|D3 /4|SAL r/m32, CL|MC|Valid|Valid|Multiply r/m32 by 2, CL times.|
|REX.W + D3 /4|SAL r/m64, CL|MC|Valid|N.E.|Multiply r/m64 by 2, CL times.|
|C1 /4 ib|SAL r/m32, imm8|MI|Valid|Valid|Multiply r/m32 by 2, imm8 times.|
|REX.W + C1 /4 ib|SAL r/m64, imm8|MI|Valid|N.E.|Multiply r/m64 by 2, imm8 times.|
|D0 /7|SAR r/m8, 1|M1|Valid|Valid|Signed divide3 r/m8 by 2, once.|
|REX + D0 /7|SAR r/m82, 1|M1|Valid|N.E.|Signed divide3 r/m8 by 2, once.|
|D2 /7|SAR r/m8, CL|MC|Valid|Valid|Signed divide3 r/m8 by 2, CL times.|
|REX + D2 /7|SAR r/m82, CL|MC|Valid|N.E.|Signed divide3 r/m8 by 2, CL times.|
|C0 /7 ib|SAR r/m8, imm8|MI|Valid|Valid|Signed divide3 r/m8 by 2, imm8 times.|
|REX + C0 /7 ib|SAR r/m82, imm8|MI|Valid|N.E.|Signed divide3 r/m8 by 2, imm8 times.|
|D1 /7|SAR r/m16,1|M1|Valid|Valid|Signed divide3 r/m16 by 2, once.|
|D3 /7|SAR r/m16, CL|MC|Valid|Valid|Signed divide3 r/m16 by 2, CL times.|
|C1 /7 ib|SAR r/m16, imm8|MI|Valid|Valid|Signed divide3 r/m16 by 2, imm8 times.|
|D1 /7|SAR r/m32, 1|M1|Valid|Valid|Signed divide3 r/m32 by 2, once.|
|REX.W + D1 /7|SAR r/m64, 1|M1|Valid|N.E.|Signed divide3 r/m64 by 2, once.|
|D3 /7|SAR r/m32, CL|MC|Valid|Valid|Signed divide3 r/m32 by 2, CL times.|
|REX.W + D3 /7|SAR r/m64, CL|MC|Valid|N.E.|Signed divide3 r/m64 by 2, CL times.|
|C1 /7 ib|SAR r/m32, imm8|MI|Valid|Valid|Signed divide3 r/m32 by 2, imm8 times.|
|REX.W + C1 /7 ib|SAR r/m64, imm8|MI|Valid|N.E.|Signed divide3 r/m64 by 2, imm8 times|
|D0 /4|SHL r/m8, 1|M1|Valid|Valid|Multiply r/m8 by 2, once.|
|REX + D0 /4|SHL r/m82, 1|M1|Valid|N.E.|Multiply r/m8 by 2, once.|
|D2 /4|SHL r/m8, CL|MC|Valid|Valid|Multiply r/m8 by 2, CL times.|
|REX + D2 /4|SHL r/m82, CL|MC|Valid|N.E.|Multiply r/m8 by 2, CL times.|
|C0 /4 ib|SHL r/m8, imm8|MI|Valid|Valid|Multiply r/m8 by 2, imm8 times.|
|REX + C0 /4 ib|SHL r/m82, imm8|MI|Valid|N.E.|Multiply r/m8 by 2, imm8 times.|
|D1 /4|SHL r/m16,1|M1|Valid|Valid|Multiply r/m16 by 2, once.|
|D3 /4|SHL r/m16, CL|MC|Valid|Valid|Multiply r/m16 by 2, CL times.|
|C1 /4 ib|SHL r/m16, imm8|MI|Valid|Valid|Multiply r/m16 by 2, imm8 times.|
|D1 /4|SHL r/m32,1|M1|Valid|Valid|Multiply r/m32 by 2, once.|

**Opcode1**

|                  | Instruction     | Op/En | 64-Bit Mode | Compat/Leg Mode | Description                             |
| ---------------- | --------------- | ----- | ----------- | --------------- | --------------------------------------- |
| REX.W + D1 /4    | SHL r/m64,1     | M1    | Valid       | N.E.            | Multiply r/m64 by 2, once.              |
| D3 /4            | SHL r/m32, CL   | MC    | Valid       | Valid           | Multiply r/m32 by 2, CL times.          |
| REX.W + D3 /4    | SHL r/m64, CL   | MC    | Valid       | N.E.            | Multiply r/m64 by 2, CL times.          |
| C1 /4 ib         | SHL r/m32, imm8 | MI    | Valid       | Valid           | Multiply r/m32 by 2, imm8 times.        |
| REX.W + C1 /4 ib | SHL r/m64, imm8 | MI    | Valid       | N.E.            | Multiply r/m64 by 2, imm8 times.        |
| D0 /5            | SHR r/m8,1      | M1    | Valid       | Valid           | Unsigned divide r/m8 by 2, once.        |
| REX + D0 /5      | SHR r/m82, 1    | M1    | Valid       | N.E.            | Unsigned divide r/m8 by 2, once.        |
| D2 /5            | SHR r/m8, CL    | MC    | Valid       | Valid           | Unsigned divide r/m8 by 2, CL times.    |
| REX + D2 /5      | SHR r/m82, CL   | MC    | Valid       | N.E.            | Unsigned divide r/m8 by 2, CL times.    |
| C0 /5 ib         | SHR r/m8, imm8  | MI    | Valid       | Valid           | Unsigned divide r/m8 by 2, imm8 times.  |
| REX + C0 /5 ib   | SHR r/m82, imm8 | MI    | Valid       | N.E.            | Unsigned divide r/m8 by 2, imm8 times.  |
| D1 /5            | SHR r/m16, 1    | M1    | Valid       | Valid           | Unsigned divide r/m16 by 2, once.       |
| D3 /5            | SHR r/m16, CL   | MC    | Valid       | Valid           | Unsigned divide r/m16 by 2, CL times    |
| C1 /5 ib         | SHR r/m16, imm8 | MI    | Valid       | Valid           | Unsigned divide r/m16 by 2, imm8 times. |
| D1 /5            | SHR r/m32, 1    | M1    | Valid       | Valid           | Unsigned divide r/m32 by 2, once.       |
| REX.W + D1 /5    | SHR r/m64, 1    | M1    | Valid       | N.E.            | Unsigned divide r/m64 by 2, once.       |
| D3 /5            | SHR r/m32, CL   | MC    | Valid       | Valid           | Unsigned divide r/m32 by 2, CL times.   |
| REX.W + D3 /5    | SHR r/m64, CL   | MC    | Valid       | N.E.            | Unsigned divide r/m64 by 2, CL times.   |
| C1 /5 ib         | SHR r/m32, imm8 | MI    | Valid       | Valid           | Unsigned divide r/m32 by 2, imm8 times. |
| REX.W + C1 /5 ib | SHR r/m64, imm8 | MI    | Valid       | N.E.            | Unsigned divide r/m64 by 2, imm8 times. |

> 1. See the IA-32 Architecture Compatibility section below.
> 
> 2. In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is used: AH, BH, CH, DH.
> 
> 3. Not the same form of division as IDIV; rounding is toward negative infinity.