| Opcode           | Instruction     | Op/En | 64-Bit Mode | Compat/Leg Mode | Description                             |
| ---------------- | --------------- | ----- | ----------- | --------------- | --------------------------------------- |
| D0 /5            | SHR r/m8,1      | M1    | Valid       | Valid           | Unsigned divide r/m8 by 2, once.        |
| REX + D0 /5      | SHR r/m82, 1    | M1    | Valid       | N.E.            | Unsigned divide r/m8 by 2, once.        |
| D2 /5            | SHR r/m8, CL    | MC    | Valid       | Valid           | Unsigned divide r/m8 by 2, CL times.    |
| REX + D2 /5      | SHR r/m82, CL   | MC    | Valid       | N.E.            | Unsigned divide r/m8 by 2, CL times.    |
| C0 /5 ib         | SHR r/m8, imm8  | MI    | Valid       | Valid           | Unsigned divide r/m8 by 2, imm8 times.  |
| REX + C0 /5 ib   | SHR r/m82, imm8 | MI    | Valid       | N.E.            | Unsigned divide r/m8 by 2, imm8 times.  |
| D1 /5            | SHR r/m16, 1    | M1    | Valid       | Valid           | Unsigned divide r/m16 by 2, once.       |
| D3 /5            | SHR r/m16, CL   | MC    | Valid       | Valid           | Unsigned divide r/m16 by 2, CL times    |
| C1 /5 ib         | SHR r/m16, imm8 | MI    | Valid       | Valid           | Unsigned divide r/m16 by 2, imm8 times. |
| D1 /5            | SHR r/m32, 1    | M1    | Valid       | Valid           | Unsigned divide r/m32 by 2, once.       |
| REX.W + D1 /5    | SHR r/m64, 1    | M1    | Valid       | N.E.            | Unsigned divide r/m64 by 2, once.       |
| D3 /5            | SHR r/m32, CL   | MC    | Valid       | Valid           | Unsigned divide r/m32 by 2, CL times.   |
| REX.W + D3 /5    | SHR r/m64, CL   | MC    | Valid       | N.E.            | Unsigned divide r/m64 by 2, CL times.   |
| C1 /5 ib         | SHR r/m32, imm8 | MI    | Valid       | Valid           | Unsigned divide r/m32 by 2, imm8 times. |
| REX.W + C1 /5 ib | SHR r/m64, imm8 | MI    | Valid       | N.E.            | Unsigned divide r/m64 by 2, imm8 times. |

> 1. See the IA-32 Architecture Compatibility section below.
> 
> 2. In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is used: AH, BH, CH, DH.
> 
> 3. Not the same form of division as IDIV; rounding is toward negative infinity.